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Chip Design for Submicron VLSI: CMOS Layout and Simulation

Uyemura, John P.

Chip Design for Submicron VLSI: CMOS Layout and Simulation - Bombay Thomson Asia Pte. Ltd. 2007 - 411p

ISBN: 9788131501955 0.00

Subjects--Personal Names:
Electronic Engineering

Dewey Class. No.: 629.39732 / UYE

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