Low Power Processors and Systems and Chips

Piguet, Christian

Low Power Processors and Systems and Chips - London CRC Press 2005 - 20-24p

Low - Power Processors and memories Techniques for Power and Process Variation Minimization Low Power DSPs Energy - efficient Reconfigurable Processors Magic, a Low - Power Reconfigurable DSP Low Power Asynchronous Processors Low - Power Baseband Processors for Communications Stand - By Power Reduction for SRAM Memories Low - Power Cache Design Memory Organization for Low - Energy Embedded Systems Low- Power Systems on Chips Power - Performance Trade - Offs in Design of SoCs Low - Power SoC with Power - Aware Operating Systems generation Low - Power Data Storage and Communication for SoC Networks on Chips: Energy - Efficient Design of SoC Interconnect Highly Integrated Ultra - Low Power RF Transceivers for Wireless Sensor Networks Power - Aware On - Demand Routing Protocols for Mobile Ad Hoc Networks Modeling Computational, Sensing and Actuation Surfaces Embedded Software Low - Power Software Techniques Low Power/Energy Compiler Optimizations Design of Low - Power Processor Cores Using a Retargetable Tool Flow Recent Advances in Low - Power Design and Functional Coverification Automation from the Earliest System - Level Design Stages Index

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Electrical Engineering

621.3916 / PIG
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