Verilog HDL: A Guide to Digital Design and Synthesis (Record no. 102292)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00539ngm a2200133 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 160206b xxu||||| |||| 00| 0 eng d |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | TCG02636 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Palnitkar, Samir |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog HDL: A Guide to Digital Design and Synthesis |
| Statement of responsibility, etc | by Samir Palintkar |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd ed |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher, distributor, etc | Pearson Education India Pvt Ltd. |
| Date of publication, distribution, etc | 2015 |
| Place of publication, distribution, etc | New Delhi |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 CD |
| Accompanying material | Book T0045569 T0045570 T0045571 T0045572 T0045573 T0045574 T0045575 T0045576 T0045577 T0045578 T0046018 T0046019 T0046020 T0046021 T0046022 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | CD/DVD |
No items available.