Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication (Record no. 104874)
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000 -LEADER | |
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fixed length control field | 01143nam a2200169 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 161024b xxu||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9780521127356 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.3815 |
Item number | KAE |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Kaeslin, Hubert |
9 (RLIN) | 7450 |
245 ## - TITLE STATEMENT | |
Title | Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Name of publisher, distributor, etc | Cambridge University Press |
Date of publication, distribution, etc | 2008 |
Place of publication, distribution, etc | New Delhi |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 845p |
500 ## - GENERAL NOTE | |
General note | Introduction to Microelectronics<br/>From Algorithms to Architectures<br/>Functional Verification<br/>Modelling Hardware with VHDL<br/>The Case for Synchronous Design<br/>Clocking of Synchronous Circuits<br/>Acquisition of Asynchronous Data<br/>Gate and Transistor Level Design<br/>Energy Efficiency and Heat Removal<br/>Signal Integrity <br/>Physical Design<br/>Design Verification<br/>VLSI Economics and Project Management <br/>Primer on CMOS Technology<br/>Outlook<br/>Appendix - A: Elementary Digital Electronics <br/>Appendix - B: Finite State Machines<br/>Appendix - C: VLSI Designer’s Checklist<br/>Appendix - D: Symbols and Constants<br/>References <br/>Index |
600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
Personal name | Computer Engineering |
9 (RLIN) | 59 |
700 ## - ADDED ENTRY--PERSONAL NAME | |
Personal name | Zurich, Eth |
9 (RLIN) | 7451 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Source of classification or shelving scheme | Dewey Decimal Classification |
Item type | Book |
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