Verilog HDL: A Guide to Digital Design and Synthesis (Record no. 27134)
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| 000 -LEADER | |
|---|---|
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| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140223b2013 xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788177589184 |
| Terms of availability | 0.00 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | DCG00431 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Palnitkar, Samir |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog HDL: A Guide to Digital Design and Synthesis |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd ed |
| Remainder of edition statement | 8th Impression 2013 |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc. | India |
| Name of publisher, distributor, etc. | Pearson Education Asia Pte. Ltd. |
| Date of publication, distribution, etc. | 2013 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1CD |
| 500 ## - GENERAL NOTE | |
| General note | D0008766 D0008767 D0008768 |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Personal name | Electronic Engineering |
| 890 ## - | |
| -- | India |
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