Logic Synthesis and Verification Algorithms (Record no. 36601)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01026nam a2200193Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140223b2006 xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788181284839 |
| Terms of availability | 0.00 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Item number | HAC |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Hachtel, Gary D. |
| 245 ## - TITLE STATEMENT | |
| Title | Logic Synthesis and Verification Algorithms |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc. | New Delhi |
| Name of publisher, distributor, etc. | Springer (India) Pvt. Ltd. |
| Date of publication, distribution, etc. | 2006 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 564p |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Personal name | Electronic Engineering |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Somenzi, Fabio |
| 890 ## - | |
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