Verilog HDL: A Guide to Digital Design and Synthesis (Record no. 43427)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00585nam a2200169Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140223b2001 xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788178084893 |
| Terms of availability | 0.00 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 |
| Item number | PAL |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Palnitkar, Samir |
| 9 (RLIN) | 1088 |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog HDL: A Guide to Digital Design and Synthesis |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc | India |
| Name of publisher, distributor, etc | Pearson Education Asia Pte. Ltd. |
| Date of publication, distribution, etc | 2001 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 396p |
| 500 ## - GENERAL NOTE | |
| General note | TCG00358 TCG00359 |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Personal name | Electronic Engineering |
| 995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE] | |
| Origin of item (home branch) (free text) | Technology Lending |
| Genre | T0014684 |
| Section | 621.392 |
| Recipient parent organisation code | T0014684 |
| 995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE] | |
| Origin of item (home branch) (free text) | Technology Lending |
| Genre | T0014685 |
| Section | 621.392 |
| Recipient parent organisation code | T0014685 |
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