Synchronous Equivalence: Formal Methods for Embedded Systems (Record no. 48956)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01040nam a2200193Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140223b2001 xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780792372622 |
| Terms of availability | 0.00 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 004.16 |
| Item number | HSI |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Hsieh, Harry |
| 245 ## - TITLE STATEMENT | |
| Title | Synchronous Equivalence: Formal Methods for Embedded Systems |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc. | New York |
| Name of publisher, distributor, etc. | Kluwer Academic / Plenum Publishers |
| Date of publication, distribution, etc. | 2001 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 136p |
| 500 ## - GENERAL NOTE | |
| General note | Introduction The Polis Codesign Framework Codesign Finite State Machines Formal Verification of CFSM Specifications Synchronous Equivalence Static Equivalence Analysis Communication Analysis Refining Communication Analysis Conclusions and Future Directions |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Personal name | Computer Engineering |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Sangiovanni-Vincentelli, Alberto |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Balarin, Felice |
| 890 ## - | |
| -- | USA |
| 995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE] | |
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| -- | 007884 |
| -- | CEE-PG0 |
| -- | 5479.41 |
| -- | 0 |
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| -- | 98323 |
| -- | 0 |
| -- | 0.00 |
| -- | 7663.51 28.5% |
| -- | 20081115 |
| -- | 02 |
| -- | C |
| -- | 20090130 |
| -- | Himanshu Book Co. |
| -- | Reference |
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