Verilog HDL: Digital Design and Modeling (Record no. 49235)
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000 -LEADER | |
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fixed length control field | 00884nam a2200169Ia 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 140223b2007 xxu||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9781420051544 |
Terms of availability | 0.00 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.392 |
Item number | CAV |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Cavanagh, Joseph |
245 ## - TITLE STATEMENT | |
Title | Verilog HDL: Digital Design and Modeling |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc. | Boca Raton |
Name of publisher, distributor, etc. | CRC Press |
Date of publication, distribution, etc. | 2007 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 900p |
500 ## - GENERAL NOTE | |
General note | Introduction Overview Language Elements Expressions Gate Level Modeling User Defined Primitives Dataflow Modeling Behavioral Modeling Structural Modeling Tasks and Functions Additional Design Examples Appendix: Event Queue Verilog Project Procedure Answers to Select Problems |
600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
Personal name | Electronic Engineering |
890 ## - | |
-- | USA |
995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE] | |
-- | CAV |
-- | 006260 |
-- | ECE-PG0 |
-- | 2866.49 |
-- | 0 |
-- | 049 |
-- | 37542 |
-- | 0 |
-- | 0.00 |
-- | 3873.64 26% |
-- | 20071019 |
-- | 05 |
-- | C |
-- | 20071023 |
-- | Books India |
-- | Reference |
No items available.