VLSI Digital Signal Processing Systems: Design and Implementation (Record no. 49258)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01174nam a2200169Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140223b1999 xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780471241867 |
| Terms of availability | 0.00 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Item number | PAR |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Parhi, Keshab K. |
| 245 ## - TITLE STATEMENT | |
| Title | VLSI Digital Signal Processing Systems: Design and Implementation |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc. | New York |
| Name of publisher, distributor, etc. | John Wiley & Sons, Inc. |
| Date of publication, distribution, etc. | 1999 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 784p |
| 500 ## - GENERAL NOTE | |
| General note | Introduction to Digital Signal Processing Systems Iteration Bound Pipelining and Parallel Processing Retiming Unfolding Folding Systolic Architecture Design Fast Convolution Algorithmic Strength Reduction in Filters and Transforms Pipelined and Parallel Recursive and Adaptive Filters Scaling and Found off Noise Digital Lattice Filter Structures Bit Level Arithmetic Architectures Redundant Arithmetic Numerical Strength Reduction Synchronous, Wave and Asynchronous Pipelines Low Power Design Programmable Digital Signal Processors |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Personal name | Electronic Engineering |
| 890 ## - | |
| -- | USA |
| 995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE] | |
| -- | PAR |
| -- | 001685 |
| -- | ECE-PG0 |
| -- | 3860.00 |
| -- | 0 |
| -- | 049 |
| -- | 081803 |
| -- | 0 |
| -- | 0.00 |
| -- | 4825.00 20% |
| -- | 4 |
| -- | C |
| -- | 20030519 |
| -- | Himanshu Book Co. |
| -- | Reference |
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