CMOS/BiCMOS ULSI: Low Voltage, Low Power

By:

Yeo, Kiat Seng

Contributor(s):

Material type: Text

TextPublication details: India Pearson Education Asia Pte. Ltd. 2002Description: 585pISBN:

9788178086033

Subject(s):

Electronic Engineering

DDC classification:

621.39732 YEO

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Item type	Current library	Item location	Collection	Call number	Status	Barcode
Book	NIMA Knowledge Centre	8th Floor Reading Zone	General	621.39732 YEO (Browse shelf(Opens below))	Available	T0021827
Book	NIMA Knowledge Centre	8th Floor Reading Zone	General	621.39732 YEO (Browse shelf(Opens below))	Available	T0021828
Book	NIMA Knowledge Centre	8th Floor Reading Zone	General	621.39732 YEO (Browse shelf(Opens below))	Available	T20554
Book	NIMA Knowledge Centre	8th Floor Reading Zone	General	621.39732 YEO (Browse shelf(Opens below))	Available	T14681
Reference Book	NIMA Knowledge Centre	6th Floor Silence Zone	Reference	621.39732 YEO (Browse shelf(Opens below))	Not For Loan	T0014680

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Acknowledgements Nomenclature Preface Introduction MOS/BiCMOS Process Technology and Integration Device Behavior and Modeling Low Voltage, Low Power Logic Circuits Low Power Latches and Flip Flops Appendix - A: Basic Equations Appendix - B: Model Equations Appendix - C: Hyperbolic (HYP) Functions Appendix - D: JUNCAP Model Index About the Authors

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