Customizable Embedded Processors: Design Technologies and Applications
Material type:
TextSeries: Morgan Kaufmann Series in Systems on SiliconPublication details: San Francisco Morgan Kaufmann Publishers 2007Description: 497pISBN: - 9780123695260
- 621.392 IEN
| Item type | Current library | Item location | Collection | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|---|---|
Reference Book
|
NIMA Knowledge Centre | 6th Floor Silence Zone | Reference | 621.392 IEN (Browse shelf(Opens below)) | Not For Loan | T0031100 |
Browsing Institute of Technology shelves, Collection: Reference Close shelf browser (Hides shelf browser)
|
|
|
|
|
No cover image available |
|
||
| 621.392 CAV Verilog HDL: Digital Design and Modeling | 621.392 DEW Analysis and Design of Digital Systems with VHDL | 621.392 GHO Hardware Description Languages: Concepts and Principles | 621.392 IEN Customizable Embedded Processors: Design Technologies and Applications | 621.392 NAY VHDL: A Logic Synthesis Approach | 621.392 SUT The Verilog PLI Handbook | 621.395 BHA Compact Mosfet Models for VLSI Design |
Part - 1: Opportunities and Challenges From Prêt a Porter to Tailor made Paolo Lenne and Rainer Leupers Opportunities for Application-Specific Processors: The Case of Wireless Communications Gerd Ascheid and Heinrich Meyr Customizing Processors: Lofty Ambitions, Stark realities Joseph A. Fisher, Paolo Faraboschi, and Cliff Young Part - 2: Aspects of Processor Customization Architecture Description Language Languages Prabhat Mishra and Nikil Dutt C Compiler Retargeting Rainer Leupers Automated Processor Configuration and Instruction Extension David Goodwin, Steve Leibson, and Grant Martin Automatic Instruction Set Extensions Laura Pozzi and Paolo Lenne Challenges to Automatic Customization Nigel Topham Coprocessor Generation from Executable Code Richard Taylor and David Stewart Datapath Synthesis Philip Brisk and Majid Sarrafzadeh Instruction Matching and Modeling Sri Parameswaran, Jorg Henkel, and Newton Cheung Processor Verification Daniel Grobe, Robert Siegmund, and Rolf Drechsler Sub RISC Processors Andrew Mihal, Scott Weber, and Kurt Keutzer Part - 3: Case Studies Application Specific Instruction set Processor for UMTS-FDD Cell Search Kimmo Puusaari, Timo Yli Pietila, and Kim Rounioja Hardware/Software tradeoffs for Advanced 3 g Channel Decoding Daniel Schmidt and Norbert When Application Code Profiling and ISA Synthesis on MIPS32 Rainer Leupers Designing soft Processors for FPGAs Goran Bilski, Sundararajarao Mohan, and Ralph Wittig Chapter References Bibliography Index
There are no comments on this title.