ESL Design and Verification: A Prescription for Electronic System Level Methodology

By:

Bailey, Brian

Contributor(s):

Material type: Text

TextPublication details: San Francisco Morgan Kaufmann Publishers 2007Description: 462pISBN:

9780123735515

Subject(s):

DDC classification:

621.3815 BAI

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Holdings
Item type	Current library	Item location	Collection	Call number	Status	Date due	Barcode	Item holds
Reference Book	NIMA Knowledge Centre	6th Floor Silence Zone	Reference	621.3815 BAI (Browse shelf(Opens below))	Not For Loan		T0037480

Total holds: 0

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Previous	621.38132 WOL Coplanar Microwave Integrated Circuits	621.3815 ASH Circuit Design	621.3815 AYE Digital Integrated Circuits: Analysis and Design	621.3815 BAI ESL Design and Verification: A Prescription for Electronic System Level Methodology	621.3815 BER Computer Simulated Experiment for Electric Circuits Using Electronic Workbench Multisim	621.3815 BER Writing Testbenches: Functional Verification of HDL Models	621.3815 BOG Electronic Devices and Circuits	Next

What Is Esl? Taxonomy and Definitions for the Electronic System Level Evolution of ESL Development What Are the Enablers of ESL? ESL Flow Specifications and Modeling Pre-Partitioning Analysis Partitioning Post-Partitioning Analysis and Debug Post-Partitioning Verification Hardware Implementation Software Implementation Use of ESL for Implementation Verification Research, Emerging and Future Prospects List of Acronyms Index

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