TY  - BOOK
AU  - Goubin, Louis
AU  - Matsui, Mitsuru
TI  - Cryptographic Hardware and Embedded Systems: CHES 2006
SN  - 9783540465591
U1  - 005.8 
PY  - 2006///
CY  - Germany
PB  - Springer
KW  - Computer Engineering
N1  - Template Attacks in Principal Subspaces
Templates vs. Stochastic Methods
Towards Security Limits in Side-Channel Attacks
HIGHT: A New Block Cipher Suitable for Low-Resource Device
Integer Factoring Utilizing PC Cluster
Optically Enhanced Position-Locked Power Analysis
Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations
A Generalized Method of Differential Fault Attack Against AES Cryptosystem
Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
Implementing Cryptographic Pairings on Smartcards
SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form
Fast Generation of Prime Numbers on Portable Devices: An Update
A Proposition for Correlation Power Analysis Enhancement
High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching
Cache-Collision Timing Attacks Against AES
Provably Secure S-Box Implementation Based on Fourier Transform
The Outer Limits of RFID Security
Three-Phase Dual-Rail Pre-charge Logic
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors
NanoCMOS-Molecular Realization of Rijndael
Improving SHA-2 Hardware Implementations
Offline Hardware/Software Authentication for Reconfigurable Platforms
Why One Should Also Secure RSA Public Key Elements
Power Attack on Small RSA Public Exponent
Unified Point Addition Formulæ and Side-Channel Attacks
Read-Proof Hardware from Protective Coatings
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Challenges for Trusted Computing
Superscalar Coprocessor for High-Speed Curve-Based Cryptography
Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller
FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers
ER  -