TY  - ADVS
AU  - Palnitkar, Samir
TI  - Verilog HDL: A Guide to Digital Design and Synthesis
SN  - 9788177589184
U1  - DCG00431 
PY  - 2013///
CY  - India
PB  - Pearson Education Asia Pte. Ltd.
KW  - Electronic Engineering
N1  - D0008766 D0008767 D0008768
ER  -