SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits
Material type:
- 9781402078378
- 621.3815 GUP
Item type | Current library | Item location | Collection | Call number | Status | Date due | Barcode | Item holds | |
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NIMA Knowledge Centre | 6th Floor Silence Zone | Reference | 621.3815 GUP (Browse shelf(Opens below)) | Not For Loan | T0034993 |
I. Introduction to High - Level Synthesis Introduction Survey of Previous Work Models and Representations Parallelizing High - Level Synthesis (PHLS) Our Parallelizing High - Level Synthesis Methodology Pre - Synthesis Compiler Optimizations Compiler and Synthesis Transformations Employed During Scheduling Code Transformations and Scheduling Resource Binding and Control Synthesis III. SPARK: Implementation, Scripts and De3sign Examples Design Examples Case Study: Synthesis of an Instruction Length Decoder IV. Future Directions Conclusions and Future Work V. Appendix Appendix - A: SPARK: Usage, Synthesis Scripts and Hardware Library Files Appendix - B: Sample Runs Bibliography
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