000			00434nam a2200157 4500
008			161026b xxu||||| |||| 00| 0 eng d
020			_a9780080971292
082			_a621.395 _bWIL
100			_aWilson, Peter _97645
245			_aDesign Recipes for FPGAs: Using Verilog and VHDL
250			_a2nd ed
260			_bElsevier _c2016 _aUSA
300			_a369p
600			_aElectronic Engineering _919
942			_2ddc _cLB
999			_c104971 _d104971