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_a629.39732 _bUYE |
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| 100 | _aUyemura, John P. | ||
| 245 | _aChip Design for Submicron VLSI: CMOS Layout and Simulation | ||
| 260 |
_aBombay _bThomson Asia Pte. Ltd. _c2007 |
||
| 300 | _a411p | ||
| 600 | _aElectronic Engineering | ||
| 890 | _aIndia | ||
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_AUYE _B005596 _CECT-NIT _D280.00 _E0 _F049 _G2713 _H0 _I0.00 _J350.00 20% _L20070227 _M02 _UC _W20070323 _XMahajan Book Depot _ZGeneral |
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