000			01709nam a2200241Ia 4500
008			140223b2002 xxu||||| |||| 00| 0 eng d
020			_a9788178086033 _c0.00
082			_a621.39732 _bYEO
100			_aYeo, Kiat Seng
245			_aCMOS/BiCMOS ULSI: Low Voltage, Low Power
260			_aIndia _bPearson Education Asia Pte. Ltd. _c2002
300			_a585p
500			_aAcknowledgements Nomenclature Preface Introduction MOS/BiCMOS Process Technology and Integration Device Behavior and Modeling Low Voltage, Low Power Logic Circuits Low Power Latches and Flip Flops Appendix - A: Basic Equations Appendix - B: Model Equations Appendix - C: Hyperbolic (HYP) Functions Appendix - D: JUNCAP Model Index About the Authors
600			_aElectronic Engineering
700			_aRofail, Samir S.
700			_aGoh, Wang Ling
890			_aIndia
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