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_a621.395 _bZEI |
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| 100 | _aZeidman, Bob | ||
| 245 | _aDesigning with FPGAs and CPLDs | ||
| 250 | _bFirst Indan Print 2011 | ||
| 260 |
_aNew Delhi _bElsevier India Pvt. Ltd. _c2010 |
||
| 300 | _a220p | ||
| 600 | _aElectronic Engineering | ||
| 890 | _aIndia | ||
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_AZEI _B009835 _CECE-PG0 _D366.30 _E0 _F049 _G5384 _H0 _I0.00 _J495.00 26% _L20101102 _M17 _UC _W20101124 _XMahajan Book Depot _ZGeneral |
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_AZEI _B009835 _CECE-PG0 _D366.30 _E0 _F049 _G5384 _H0 _I0.00 _J495.00 26% _L20101102 _M17 _UC _W20101124 _XMahajan Book Depot _ZGeneral |
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_c30818 _d30818 |
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