000			01248nam a2200205Ia 4500
008			140223b2007 xxu||||| |||| 00| 0 eng d
020			_a9780123735515 _c0.00
082			_a621.3815 _bBAI
100			_aBailey, Brian
245			_aESL Design and Verification: A Prescription for Electronic System Level Methodology
260			_aSan Francisco _bMorgan Kaufmann Publishers _c2007
300			_a462p
500			_aWhat Is Esl? Taxonomy and Definitions for the Electronic System Level Evolution of ESL Development What Are the Enablers of ESL? ESL Flow Specifications and Modeling Pre-Partitioning Analysis Partitioning Post-Partitioning Analysis and Debug Post-Partitioning Verification Hardware Implementation Software Implementation Use of ESL for Implementation Verification Research, Emerging and Future Prospects List of Acronyms Index
600			_aComputer Engineering
600			_aSystems on a Chip - Design and Construction
700			_aMartin, Grant
700			_aPiziali, Andrew
890			_aUSA
995			_ABAI _B008385 _CCEE-PG0 _D2225.41 _E0 _F049 _GIN815 _H0 _I0.00 _J3090.85 28% _L20090507 _M01 _UC _W20100115 _XKushal Books _ZReference
999			_c45868 _d45868