000			01746nam a2200193Ia 4500
008			140223b2008 xxu||||| |||| 00| 0 eng d
020			_a9780387726700 _c0.00
082			_a621.395 _bHAM
100			_aHamblen, James O.
245			_aRapid Prototyping at Digital Systems SOPC Edition
260			_aNew York _bSpringer Science+Business Media, Inc _c2008
300			_a411p
500			_aTCG01797 Tutorial 1: The 15 Minute Design FPGA Development Board Hardware and I/O Features Programmable Logic Technology Tutorial 2: Sequential Design and Hierarchy FPGAcore Library Functions Using VHDL for Synthesis of Digital Hardware Using Verilog for Synthesis of Digital Hardware State Machine Design: The Electric Train Controller A Simple Computer Design: The u P 3 VGA Video Display Generation Using FPGAs Interfacing to the PS/2 Keyboard and Mouse Legacy Digital I/O Interfacing Standards FPGA Robotics Projects A RISC Design: Synthesis of the MIPS Processor Core Introducing System - on - a Programmable - Chip Tutorial 3: Processor Software Development Tutorial 4: Nios 2 Processor Hardware Design Operating System Support for SOPC Design Appendix - A: Generation of Pseudo Random Binary Sequences Appendix - B: Quartus 2 Design and Data File Extensions Appendix - C: Common FPGA Pin Assignments Appendix - D: ASCII Character Code Appendix - E: Common I/O Connector Pin Assignments
600			_aElectronic Engineering
700			_aFurman, Michael D.
700			_aHall, Tyson S.
890			_aUSA
995			_AHAM _B006336 _CECE-PG0 _D2605.67 _E0 _F049 _G96462 _H0 _I0.00 _J3521.17 26% _L20071114 _M05 _UC _W20080423 _XHimanshu Book Co. _ZReference
999			_c48424 _d48424