000 01040nam a2200193Ia 4500
008 140223b2001 xxu||||| |||| 00| 0 eng d
020 _a9780792372622
_c0.00
082 _a004.16
_bHSI
100 _aHsieh, Harry
245 _aSynchronous Equivalence: Formal Methods for Embedded Systems
260 _aNew York
_bKluwer Academic / Plenum Publishers
_c2001
300 _a136p
500 _aIntroduction The Polis Codesign Framework Codesign Finite State Machines Formal Verification of CFSM Specifications Synchronous Equivalence Static Equivalence Analysis Communication Analysis Refining Communication Analysis Conclusions and Future Directions
600 _aComputer Engineering
700 _aSangiovanni-Vincentelli, Alberto
700 _aBalarin, Felice
890 _aUSA
995 _AHSI
_B007884
_CCEE-PG0
_D5479.41
_E0
_F049
_G98323
_H0
_I0.00
_J7663.51 28.5%
_L20081115
_M02
_UC
_W20090130
_XHimanshu Book Co.
_ZReference
999 _c48956
_d48956