| 000 | 00999nam a2200181Ia 4500 | ||
|---|---|---|---|
| 008 | 140223b2003 xxu||||| |||| 00| 0 eng d | ||
| 020 |
_a9780521773560 _c0.00 |
||
| 082 |
_a621.395 _bJHA |
||
| 100 | _aJha, N. K. | ||
| 245 | _aTesting of Digital Systems | ||
| 260 |
_aCambridge _bCambridge University Press _c2003 |
||
| 300 | _a1000p | ||
| 500 | _aIntroduction Fault Models Combinational Logic and Fault Simulation Test Generation for Combinational Circuits Sequential ATPG IDDQ Testing Functional Testing Delay Fault Testing CMOS Testing Fault Diagnosis Design for Testability Built in Self Test Synthesis for Testability Memory Testing High Level Test Synthesis System on a Chip Test Synthesis Index | ||
| 600 | _aElectronic Engineering | ||
| 700 | _aGupta, S. | ||
| 890 | _aUK | ||
| 995 |
_AJHA _B004958 _CECE-PG0 _D4255.39 _E0 _F049 _G2333 _H0 _I0.00 _J5869.50 27.5% _L20060926 _M04 _UC _W20061208 _XMahajan Book Depot _ZReference |
||
| 999 |
_c49026 _d49026 |
||