| 000 | 00831nam a2200181Ia 4500 | ||
|---|---|---|---|
| 008 | 140223b2003 xxu||||| |||| 00| 0 eng d | ||
| 020 |
_a9781402074011 _c0.00 |
||
| 082 |
_a621.3815 _bBER |
||
| 100 | _aBergeron, Janick | ||
| 245 | _aWriting Testbenches: Functional Verification of HDL Models | ||
| 250 | _a2nd ed | ||
| 260 |
_aLondon _bSpringer-Verlag _c2003 |
||
| 300 | _a475p | ||
| 500 | _aWhat is Verification? Verification Tools The Verification Plan High Level Modeling Stimulus and Response Architecting Testbenches Simulation Management Coding Guidelines | ||
| 600 | _aElectronic Engineering | ||
| 890 | _aUK | ||
| 995 |
_ABER _B004546 _CECE-PG0 _D4357.68 _E0 _F049 _G090422 _H0 _I0.00 _J6010.59 27.5% _L20060325 _M01 _UC _W20060329 _XHimanshu Book Co. _ZReference |
||
| 999 |
_c49432 _d49432 |
||