Routing Congestion in VLSI Circuits: Estimation and Optimization
Saxena, Prashant
Routing Congestion in VLSI Circuits: Estimation and Optimization - New York Springer Science+Business Media, Inc 2007 - 248p
Part - 1: The Origins of Congestion An Introduction to Routing Congestion Part - 2: The Estimation of Congestion Placement-Level Metrics for Routing Congestion Synthesis-Level Metrics for Routing Congestion Part - 3: The Optimization of Congestion Congestion Optimization during Interconnects Synthesis and Routing Congestion Optimization during Placement Congestion Optimization during Technology Mapping and Logic Synthesis Congestion Implications of High Level Design
9780387300375 0.00
Electronic Engineering
621.395 / SAX
Routing Congestion in VLSI Circuits: Estimation and Optimization - New York Springer Science+Business Media, Inc 2007 - 248p
Part - 1: The Origins of Congestion An Introduction to Routing Congestion Part - 2: The Estimation of Congestion Placement-Level Metrics for Routing Congestion Synthesis-Level Metrics for Routing Congestion Part - 3: The Optimization of Congestion Congestion Optimization during Interconnects Synthesis and Routing Congestion Optimization during Placement Congestion Optimization during Technology Mapping and Logic Synthesis Congestion Implications of High Level Design
9780387300375 0.00
Electronic Engineering
621.395 / SAX