Hardware Design Verification: Simulation and Formal Method-Based Approaches
Lam, William K.
Hardware Design Verification: Simulation and Formal Method-Based Approaches - New York Prentice Hall 2005 - 585p
An Invitation to Design Verification Coding for Verification Simulator Architectures and Operations Test Bench Organization and Design Test Scenarios, Assertions, and Coverage Debugging Process and Verification Cycle Formal Verification Preliminaries Design Diagrams, Equivalence Checking, and Symbolic Simulation Model Checking and Symbolic Computation
9780131433472 0.00
Electrical Engineering
621.39 / LAM
Hardware Design Verification: Simulation and Formal Method-Based Approaches - New York Prentice Hall 2005 - 585p
An Invitation to Design Verification Coding for Verification Simulator Architectures and Operations Test Bench Organization and Design Test Scenarios, Assertions, and Coverage Debugging Process and Verification Cycle Formal Verification Preliminaries Design Diagrams, Equivalence Checking, and Symbolic Simulation Model Checking and Symbolic Computation
9780131433472 0.00
Electrical Engineering
621.39 / LAM