Hardware Design Verification: Simulation and Formal Method-Based Approaches (Record no. 46601)
[ view plain ]
000 -LEADER | |
---|---|
fixed length control field | 01004nam a2200169Ia 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 140223b2005 xxu||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9780131433472 |
Terms of availability | 0.00 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.39 |
Item number | LAM |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Lam, William K. |
245 ## - TITLE STATEMENT | |
Title | Hardware Design Verification: Simulation and Formal Method-Based Approaches |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc. | New York |
Name of publisher, distributor, etc. | Prentice Hall |
Date of publication, distribution, etc. | 2005 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 585p |
500 ## - GENERAL NOTE | |
General note | An Invitation to Design Verification Coding for Verification Simulator Architectures and Operations Test Bench Organization and Design Test Scenarios, Assertions, and Coverage Debugging Process and Verification Cycle Formal Verification Preliminaries Design Diagrams, Equivalence Checking, and Symbolic Simulation Model Checking and Symbolic Computation |
600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
Personal name | Electrical Engineering |
890 ## - | |
-- | USA |
995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE] | |
-- | LAM |
-- | 005126 |
-- | ECE-PG0 |
-- | 3628.99 |
-- | 0 |
-- | 049 |
-- | 092350 |
-- | 0 |
-- | 0.00 |
-- | 5005.50 27.5% |
-- | 20061111 |
-- | 01 |
-- | C |
-- | 20070116 |
-- | Himanshu Book Co. |
-- | Reference |
No items available.