Power Aware Testing and Test Strategies for Low Power Devices (Record no. 48072)

MARC details
000 -LEADER
fixed length control field 01201nam a2200181Ia 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781441909275
Terms of availability 0.00
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Item number POW
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Girard, Patrick
245 ## - TITLE STATEMENT
Title Power Aware Testing and Test Strategies for Low Power Devices
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc. New York
Name of publisher, distributor, etc. Springer Science+Business Media, Inc
Date of publication, distribution, etc. 201
300 ## - PHYSICAL DESCRIPTION
Extent 363p
500 ## - GENERAL NOTE
General note Summary and Objective of the Book About the Editors Preface Contributors Fundamentals of VLSI Testing Power Issues During Test Low Power Test Pattern Generation Power Aware Design for Test Power Aware Test Data Compression and BIST Power Aware System Level Test Planning Low Power Design Techniques and Test Implications Test Strategies forMultivoltage Designs Test Strategies for Gated Clock Designs Test of Power Management Structures EDA Solution for Power Aware Design for Test Summary Index
600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME
Personal name Electrical Engineering
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Wen, Xiaoqing
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Nicolici, Nicola
890 ## -
-- USA
995 ## - RECOMMENDATION 995 [LOCAL, UNIMARC FRANCE]
-- POW
-- 011119
-- ECE-PG0
-- 8273.58
-- 0
-- 049
-- IN494
-- 0
-- 0.00
-- 12404.17 33.30%
-- 20130530
-- 03
-- C
-- 20130821
-- Kushal Books
-- Reference

No items available.

© 2025 by NIMA Knowledge Centre, Ahmedabad.
Koha version 24.05