Verilog HDL: Digital Design and Modeling

By:

Cavanagh, Joseph

Material type: Text

TextPublication details: Boca Raton CRC Press 2007Description: 900pISBN:

9781420051544

Subject(s):

Electronic Engineering

DDC classification:

621.392 CAV

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Item type	Current library	Item location	Collection	Call number	Status	Date due	Barcode	Item holds
Reference Book	NIMA Knowledge Centre	6th Floor Silence Zone	Reference	621.392 CAV (Browse shelf(Opens below))	Not For Loan		T0031081

Total holds: 0

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Previous	621.3916 STI Design with Microprocessors for Mechanical Engineering	621.3916 YIU The Definitive Guide to the ARM Cortex-M3	621.392 BHA A VHDL Primer	621.392 CAV Verilog HDL: Digital Design and Modeling	621.392 DEW Analysis and Design of Digital Systems with VHDL	621.392 GHO Hardware Description Languages: Concepts and Principles	621.392 IEN Customizable Embedded Processors: Design Technologies and Applications	Next

Introduction Overview Language Elements Expressions Gate Level Modeling User Defined Primitives Dataflow Modeling Behavioral Modeling Structural Modeling Tasks and Functions Additional Design Examples Appendix: Event Queue Verilog Project Procedure Answers to Select Problems

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