Routing Congestion in VLSI Circuits: Estimation and Optimization

By:

Saxena, Prashant

Contributor(s):

Material type: Text

TextPublication details: New York Springer Science+Business Media, Inc 2007Description: 248pISBN:

9780387300375

Subject(s):

Electronic Engineering

DDC classification:

621.395 SAX

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Item type	Current library	Item location	Collection	Call number	Status	Date due	Barcode	Item holds
Reference Book	NIMA Knowledge Centre	6th Floor Silence Zone	Reference	621.395 SAX (Browse shelf(Opens below))	Not For Loan		T0033647

Total holds: 0

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Part - 1: The Origins of Congestion An Introduction to Routing Congestion Part - 2: The Estimation of Congestion Placement-Level Metrics for Routing Congestion Synthesis-Level Metrics for Routing Congestion Part - 3: The Optimization of Congestion Congestion Optimization during Interconnects Synthesis and Routing Congestion Optimization during Placement Congestion Optimization during Technology Mapping and Logic Synthesis Congestion Implications of High Level Design

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