Computer Arithmetic and Verilog HDL Fundamentals

By:

Cavanagh, Joseph

Material type: Text

TextPublication details: Boca Raton CRC Press 2010Description: 951pISBN:

9781439811245

Subject(s):

Electronic Engineering

DDC classification:

004.01513 CAV

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Holdings
Item type	Current library	Item location	Collection	Call number	Status	Date due	Barcode	Item holds
Reference Book	NIMA Knowledge Centre	7th Floor Silence Zone	Reference	004.01513 CAV (Browse shelf(Opens below))	Not For Loan		T0040038

Total holds: 0

Number Systems and Number Representations Logic Design Fundamentals Introduction to Verilog HDL Fixed Point Addition Fixed Point Subtraction Fixed Point Multiplication Fixed Point Division Decimal Subtraction Decimal Multiplication Decimal Division Floating Point Addition Floating Point Subtraction Floating Point Multiplication Floating Point Division Additional Floating Point Topics Additional Topics in Computer Arithmetic Appendix - A: Verilog HDL Designs for Select Logic Function Appendix - B: Event Queue Appendix - C: Verilog HDL Project Procedure Appendix - D: Answers to Select Problems

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