Power Aware Testing and Test Strategies for Low Power Devices

By:

Girard, Patrick

Contributor(s):

Material type: Text

TextPublication details: New York Springer Science+Business Media, Inc 201Description: 363pISBN:

9781441909275

Subject(s):

Electrical Engineering

DDC classification:

621.3815 POW

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Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Item location	Collection	Call number	Status	Date due	Barcode	Item holds
Reference Book	NIMA Knowledge Centre	6th Floor Silence Zone	Reference	621.3815 POW (Browse shelf(Opens below))	Not For Loan		T0041434

Total holds: 0

Summary and Objective of the Book About the Editors Preface Contributors Fundamentals of VLSI Testing Power Issues During Test Low Power Test Pattern Generation Power Aware Design for Test Power Aware Test Data Compression and BIST Power Aware System Level Test Planning Low Power Design Techniques and Test Implications Test Strategies forMultivoltage Designs Test Strategies for Gated Clock Designs Test of Power Management Structures EDA Solution for Power Aware Design for Test Summary Index

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